Variable Resistance Spectrum Assignment in Phase Change Memory Systems

Phase change memory (PCM) has rapidly progressed and surpassed dynamic random-access memory in terms of scalability and standby energy efficiency. While PCM cell size is marching toward the minimum achievable feature size, recent prototypes effectively improve device scalability by storing multiple bits per cell. Unfortunately, the density advantage of multilevel cell (MLC) PCM devices comes at the cost of higher latency and energy consumption as well as low resilience to soft errors because of resistance drift. To address these challenges, we propose variable resistance spectrum MLC PCM (VR-PCM), a simple microarchitectural technique to handle main memory access mechanisms with more efficient drift-aware MLC PCM access operations. VR-PCM relies on the observation that data patterns at various granularities are nonuniformly distributed across memory transactions when running various workloads. Motivated by this observation, VR-PCM reconfigures PCM resistance spectrum partitioning into nonuniform regions that are then assigned to the binary data patterns based on their occurrence frequency. Using full-system evaluation of an MLC PCM main memory with conservative resistance drift model, we show that VR-PCM tailored for high-density MLCs delivers considerable improvements in performance (13.25%), energy (21.2%), and lifetime (1.77 x ), on average.