Cost-Efficient Frequency-Domain MIMO–OFDM Modem With an SIMD ALU-Based Architecture

In this paper, a single instruction multiple data (SIMD) arithmetic logic unit (ALU)-based architecture is proposed to improve hardware efficiency in a 4 × 4 frequency-domain multiple input multiple output-orthogonal frequency division multiplexing modem based on a space-time block code (STBC). The majority of mathematic units in the proposed architecture are centralized so that any mathematic unit can be shared with any algorithm. Six advanced instructions are also defined in the ALU: 1) complex multiplication; 2) complex division; 3) correlation; 4) channel estimation; 5) 4 × 4 matrix inversion; and 6) STBC-based decoding. A scheduler is essential to handle all data paths and signaling flows smoothly with the use of an SIMD ALU. As a result, it is relatively easy to reconfigure the proposed design for different specifications. The very large scale integration implementation of this chip, using an in-house 65-nm CMOS process, consumes a total of 1.87 M gates and draws 33.7 mW at a supply voltage of 1 V.