Title :
Test Vector Omission for Fault Coverage Improvement of Functional Test Sequences
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
Test vector omission was introduced as a static test compaction procedure for functional test sequences. Experimental results indicated that it can also increase the fault coverage accidentally when it is applied to a sequence that does not detect all the detectable target faults. However, this capability was not explored directly. It is important since test vector omission provides a smaller search space for functional test sequences than any existing approach to sequential test generation. This paper describes a branch-and-bound procedure for test vector omission whose goal is to find functional test sequences for faults that are not detected by a given sequence. Experimental results for benchmark circuits demonstrate that the procedure provides a cost-effective addition to a simulation-based sequential test generation procedure.
Keywords :
benchmark testing; circuit testing; tree searching; vectors; benchmark circuits; branch-and-bound procedure; fault coverage improvement; functional test sequences; simulation-based sequential test generation; static test compaction procedure; test vector omission; Benchmark testing; Circuit faults; Clocks; Compaction; Computational complexity; Computational modeling; Vectors; Branch-and-bound; functional test sequences; static test compaction; test generation;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.2015.2395424