NVMain 2.0: A User-Friendly Memory Simulator to Model (Non-)Volatile Memory Systems

Author

Poremba, Matthew ; Tao Zhang ; Yuan Xie

Author_Institution

Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA

Volume

14

Issue

2

fYear

2015

Firstpage

140

Lastpage

143

Abstract

In this letter, a flexible memory simulator - NVMain 2.0, is introduced to help the community for modeling not only commodity DRAMs but also emerging memory technologies, such as die-stacked DRAM caches, non-volatile memories (e.g., STT-RAM, PCRAM, and ReRAM) including multi-level cells (MLC), and hybrid non-volatile plus DRAM memory systems. Compared to existing memory simulators, NVMain 2.0 features a flexible user interface with compelling simulation speed and the capability of providing sub-array-level parallelism, fine-grained refresh, MLC and data encoder modeling, and distributed energy profiling.

Keywords

DRAM chips; cache storage; memory architecture; phase change memories; user interfaces; DRAM memory systems; NVMain 2.0; PCRAM; ReRAM; STT-RAM; commodity DRAM; die-stacked DRAM cache; flexible memory simulator; flexible user interface; memory technology; multilevel cells; nonvolatile memory system; user-friendly memory simulator; Computational modeling; Computer architecture; Memory management; Nonvolatile memory; Phase change random access memory; Memory architecture, random access memory, nonvolatile memory, phase change memory, SDRAM;

fLanguage

English

Journal_Title

Computer Architecture Letters

Publisher

ieee

ISSN

1556-6056

Type

jour

DOI

10.1109/LCA.2015.2402435

Filename

7038174