Using Two-Step Mesa to Prevent the Effects of Sidewall Defects on the GaN p-i-n Diodes

In this paper, the two-step mesas of quasi-vertical GaN p-i-n diodes grown on pattern sapphire substrates (PSSs) with a 3-μm i-layer were defined by two-step dry etching to different depths to prevent the effects of sidewall damages. As compared with the one-step mesa device, the two-step mesa devices show lower reverse leakage currents, lower capacitances, lower specific ON-resistances, and higher reverse breakdown voltages. Furthermore, one of the two-step mesa devices with plasma treatment exhibits about two orders of magnitude of reduction in the leakage current at -100 V, a breakdown voltage of 495 V, and a specific ON-resistance (RONA) of 0.27 mΩ-cm². Baliga´s figures of merit (V_B²/RONA) of 0.908 GW/cm², which is the highest value reported for the fabricated GaN p-i-n diodes grown on sapphire, is achieved for the GaN p-i-n diode grown on PSS with a two-step mesa and plasma treatment.