DocumentCode
3607646
Title
84 GBd (168 Gbit/s) PAM-4 3.7 Vpp power DAC in InP DHBT for short reach and long haul optical networks
Author
Konczykowska, A. ; Jorge, F. ; Dupuy, J.-Y. ; Riet, M. ; Nodjiadjim, V. ; Aubry, H. ; Adamiecki, A.
Author_Institution
III-V Lab., Alcatel-Thales, Marcoussis, France
Volume
51
Issue
20
fYear
2015
Firstpage
1591
Lastpage
1593
Abstract
The architecture and performances of a multilevel driver for pulse amplitude modulation (PAM) formats, designed and fabricated in 0.7 μm InP double-heterojunction bipolar transistor technology, are reported. The driver part is based on a power-DAC architecture which is integrated with the multiplexing stage composed of three 2:1 selectors. Up to 100 GS/s operation was validated and PAM-2, -4, -8 signals with high amplitude were measured. In particular, PAM-4 at 84 GBd and PAM-8 at 64 GBd operation was demonstrated with, respectively, a 3.7 and 4 Vpp differential output signal. This compact driver circuit is characterised by the highest merit factor in terms of high amplitude and the transmission capacity for an electronically generated multilevel signal.
Keywords
III-V semiconductors; digital-analogue conversion; driver circuits; heterojunction bipolar transistors; indium compounds; pulse amplitude modulation; InP; InP double-heterojunction bipolar transistor technology; PAM formats; PAM-2; PAM-4; PAM-8 signals; bit rate 168 Gbit/s; compact driver circuit; electronically generated multilevel signal; long haul optical networks; multilevel driver; multiplexing stage; power-DAC architecture; pulse amplitude modulation formats; size 0.7 mum; transmission capacity; voltage 3.7 V; voltage 4 V;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el.2015.2316
Filename
7289497
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