DocumentCode :
3613500
Title :
A bridge for a multiprocessor graphics system
Author :
A. Balatsos;M. Aleksic
Author_Institution :
ATI Technol. Inc., Toronto, Ont., Canada
Volume :
2
fYear :
2002
fDate :
6/24/1905 12:00:00 AM
Firstpage :
646
Abstract :
The ongoing demand for better computer games has been the primary force driving graphics chips at an extreme pace. The new generation of graphics accelerators (GPUs) has migrated from 0.18 to 0.15/0.13-micron in recent years. They provide powerful floating point streaming engines with deep pipelining and operate at multiple pixels per clock. We describe a novel multiprocessor graphics system (MAX) and a specialized bridge that allows applications to scale performance for high-end graphics systems. Our system uses standard graphics processors with dedicated VLSI bridge chips for AGP/PCI bus support. Scalability can be achieved in two ways: by time multiplexing or by image parallelism. In time multiplexing mode, different GPUs render different frames keeping the command traffic the same as in the single GPU case. When load balancing is done by image parallelism, the image space is split between GPUs and each GPU renders only a dedicated image segment. The custom VLSI bridge supports parallel rendering by routing between GPUs and also by interfacing to the host CPU and main memory through the AGP4X bus (1 GB/s). It also contains enhanced features to facilitate the broadcast/routing of graphics data from the host.
Keywords :
"Bridges","Computer graphics","Rendering (computer graphics)","Very large scale integration","Parallel processing","Routing","Engines","Pipeline processing","Clocks","Scalability"
Publisher :
ieee
Conference_Titel :
Electrical and Computer Engineering, 2002. IEEE CCECE 2002. Canadian Conference on
ISSN :
0840-7789
Print_ISBN :
0-7803-7514-9
Type :
conf
DOI :
10.1109/CCECE.2002.1013017
Filename :
1013017
Link To Document :
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