DocumentCode
3616335
Title
A new approach to linear connections building BIST structure based on CSTP structure
Author
I. Gosciniak
Author_Institution
Inst. of Comput. Sci., Univ. of Silesia, Katowice, Poland
fYear
2004
fDate
6/26/1905 12:00:00 AM
Firstpage
256
Lastpage
263
Abstract
The paper presents a method to build testing structure of single- and multi-modular circuits. The presented method is based on creation of linear connections which build the testing structure of a circuit equipped with CSTP structure, composed of boundary scan path elements. The results of investigations testify efficiency of the method. The discussion on influence of different modifications of CSTP structure on work efficiency was made. The method discussed in the paper can become an alternative to the method which separates internal self-testing paths.
Keywords
"Buildings","Built-in self-test","Circuit testing","Registers","Feedback circuits","Circuit faults","Computer science","Design for testability","Production","Integrated circuit technology"
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings. 19th IEEE International Symposium on
ISSN
1550-5774
Print_ISBN
0-7695-2241-6
Type
conf
DOI
10.1109/DFTVS.2004.1347847
Filename
1347847
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