DocumentCode
3620344
Title
Improvement of the fault coverage of the pseudo-random phase in column-matching BIST
Author
P. Fiser;H. Kubatova
Author_Institution
Dept. of Comput. Sci. & Eng., Czech Tech. Univ., Prague, Czech Republic
fYear
2005
fDate
6/27/1905 12:00:00 AM
Firstpage
56
Lastpage
63
Abstract
Several methods improving the fault coverage in mixed-mode BIST are presented in this paper. The test is divided into two phases: the pseudo-random and deterministic. Maximum of faults should be detected by the pseudo-random phase, to reduce the number of faults to be covered in the deterministic one. We study the properties of different pseudo-random pattern generators. Their successful ness in fault covering strictly depends on the tested circuit. We examine properties of LFSRs and cellular automata. Four methods enhancing the pseudo-random fault coverage have been proposed. Then we propose a universal method to efficiently compute test weights. The observations are documented on some of the standard ISCAS benchmarks and the final BIST circuitry is synthesized using the column-matching method.
Keywords
"Built-in self-test","Circuit testing","Circuit faults","Fault detection","Logic testing","Test pattern generators","Logic design","Decoding","Switches","Computer science"
Publisher
ieee
Conference_Titel
Digital System Design, 2005. Proceedings. 8th Euromicro Conference on
Print_ISBN
0-7695-2433-8
Type
conf
DOI
10.1109/DSD.2005.51
Filename
1559778
Link To Document