DocumentCode :
3622155
Title :
Dependence of DGMOSFET 1/f Noise on Transistor Geometry and Technology Parameters
Author :
M. Videnovic-Misic;M.M. Jevtic
Author_Institution :
Dept. of Electron., Novi Sad Univ.
fYear :
2006
fDate :
6/28/1905 12:00:00 AM
Firstpage :
536
Lastpage :
539
Abstract :
In this paper theoretical study of a dual-gate MOSFET (DGMOSFET) 1/f noise and its sensitivity to variation of transistor geometry and technology parameters is presented. Expression for 1/f current noise spectral density Sid(f) is obtained using an ac current approach in a DGMOSFET LF small-signal noise equivalent circuit. The results show 1/f Sid(f) level increase with L1 increase and W decrease. For a single MOS transistor and L increase opposite 1/f noise behaviour is observed. In case of a DGMOSFET, not only transistors noise sources influence overall noise but also dynamic transistors parameters and load resistance RL. Sensitivity of Sid (f) to source/drain junction depth xj is minimal as a consequence of "long channel" DGMOSFET structure. As for oxide thickness, 1/f noise level show expected increase with tox increase
Keywords :
"Geometry","Low-frequency noise","Circuit noise","Oscillators","Phase noise","MOSFET circuits","Employee welfare","Voltage","Radio frequency","Circuit optimization"
Publisher :
ieee
Conference_Titel :
Microelectronics, 2006 25th International Conference on
Print_ISBN :
1-4244-0117-8
Type :
conf
DOI :
10.1109/ICMEL.2006.1651021
Filename :
1651021
Link To Document :
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