Thermal design principles and characterization of miniaturized surface-mount packages for power electronics

The major factors affecting the power dissipation capabilities of SOIC packages, including lead-frame design, airflow, and board and ambient temperatures, are presented. Results show that modifying an eight-lead SOIC package with a four-lead power tab increases the package´s power dissipating capabilities to beyond 2 W for natural convection cooling, more than double that of a standard SO-8 package. Extensive 3D finite element thermal studies reveal that, while the modified package exhibits a thermal resistance of 28 degrees C/W, the PC (printed circuit) board typically contributes an additional 34 degrees C/W. It is demonstrated that the finite element method significantly contributes to the ability of a system designer to optimally utilize space-efficient SOIC packages from a series of parametric choices and tradeoffs. The effect of package and circuit board on the maximum power dissipation and junction temperature of surface-mounted power MOSFETs is thus clarified.