Title :
Analytical Modeling of Hot-Carrier Induced Degradation of MOS Transistor for Analog Design for Reliability
Author :
Benoit Dubois;Jean-Baptiste Kammerer;Luc Hebrard;Francis Braun
Author_Institution :
Institut d´Electronique du Solide et des Systemes, France
fDate :
3/1/2007 12:00:00 AM
Abstract :
A CMOS transistor ageing analytical model is presented and the procedure that allows to extract its parameters is proposed in this paper. By using a simple, example, we show how such a model can be used to forecast the drifts of the main characteristics of a CMOS circuit Further, we demonstrate that this model can also be used to help the designer to choose and/or modify a circuit in order to minimize the hot-carrier induced degradations. Simulation results compared to the analytical study are also shown
Keywords :
"Analytical models","Hot carriers","Degradation","MOSFETs","Interface states","Aging","Semiconductor device modeling","Predictive models","Circuit simulation","Voltage"
Conference_Titel :
Quality Electronic Design, 2007. ISQED ´07. 8th International Symposium on
Print_ISBN :
0-7695-2795-7
DOI :
10.1109/ISQED.2007.37
