DocumentCode
3625683
Title
Crosstalk-Insensitive Method for Testing of Delay Faults in Interconnects Between Cores in SoCs
Author
T. Garbolino;K. Gucwa;M. Kopec;A. Hlawiczka
Author_Institution
Institute of Electronics, Silesian University of Technology, Akademicka 16, 44-100 Gliwice, Poland. e-mail: tgarbolino@polsl.pl
fYear
2007
fDate
6/1/2007 12:00:00 AM
Firstpage
496
Lastpage
500
Abstract
A method for reliable measurement of interconnect delays is presented in the paper. The mode of test vectors generation never induces crosstalks. That is why the delay measurement is reliable. Also, minimization of ground bounce noises and reduction of power consumption during the test is an additional advantage. The presented method allows also localizing and identifying static faults of both stuck-at (SaX) and short types. The paper deals with the hardware that is necessary for implementing the method. The techniques for test data compression, that allow substantial reduction of data volume transferred between SoC and ATE, are also proposed.
Keywords
"Crosstalk","Testing","Delay","Frequency","Integrated circuit interconnections","Semiconductor device measurement","Clocks","Circuit faults","Fault diagnosis","Hardware"
Publisher
ieee
Conference_Titel
Mixed Design of Integrated Circuits and Systems, 2007. MIXDES ´07. 14th International Conference on
Print_ISBN
83-922632-4-3
Type
conf
DOI
10.1109/MIXDES.2007.4286213
Filename
4286213
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