Title :
A 10GHz UWB CMOS LNA
Author :
Ciprian Mircea Pavaluta
Author_Institution :
Infineon Technologies Romania, Blvd. Dimitrie Pompeiu nr. 6, Bucharest, Romania. E-mail: CiprianMircea.Pavaluta@infineon.com
Abstract :
This paper presents a 10 Ghz bandwidth 50 Omega input matching monolithic LNA, designed by implementing the noise cancellation technique (NCT) [2] for a CMOS transistor on single input amplifier architecture. The noise figure (NF) performance of the new proposed amplifier is as low as 2.3 dB@2 Ghz. The gain of the amplifier is higher than 20 dB@10 Ghz, the IP3 is 5 dBm@6 Ghz and its power consumption is smaller than 20 mW at 1.20 V voltage supply.
Keywords :
"Noise cancellation","Impedance matching","Circuit noise","Noise generators","CMOS technology","Bandwidth","Frequency","Noise figure","Parasitic capacitance","Noise measurement"
Conference_Titel :
Semiconductor Conference, 2007. CAS 2007. International
Print_ISBN :
978-1-4244-0847-4
Electronic_ISBN :
2377-0678
DOI :
10.1109/SMICND.2007.4519761
