• DocumentCode
    3631300
  • Title

    Latent interface-trap generation during thermal annealing of /spl gamma/-ray irradiated power VDMOSFETs

  • Author

    A. Jaksic;G. Ristic;M. Pejovic

  • Author_Institution
    Fac. of Electron. Eng., Nis Univ., Serbia
  • fYear
    1995
  • Firstpage
    215
  • Lastpage
    218
  • Abstract
    The behaviour of the threshold voltage in commercial n-channel power VDMOSFETs during biased thermal annealing, following /spl gamma/-ray radiation exposure, is investigated. It is found that ´rebound´ effect, observed in transistors irradiated and annealed with positive gate bias, is mainly due to the ´latent´ interface-trap generation. Possible mechanism for latent interface-trap buildup is proposed.
  • Keywords
    "Power generation","Annealing","Threshold voltage","Electron traps","Power MOSFET","MOSFET circuits","Communication switching","Temperature measurement","Power engineering and energy","Thermal engineering"
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Conference, 1995. CAS´95 Proceedings., 1995 International
  • Print_ISBN
    0-7803-2647-4
  • Type

    conf

  • DOI
    10.1109/SMICND.1995.494901
  • Filename
    494901
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3631300