High dependable implementation of Neural Networks with networks on chip architecture and a backtracking routing algorithm

Networks on Chip (NoC), a new packet-based design method, with a new Dependable No Deadlock (DND) back-tracking routing algorithm are proposed to implement Artificial Neural Network (ANN). This system is simulated by NIRGAM NoC simulator to get system performance. Experimental results show that this proposed system has higher Connection-Per-Second (CPS), lower communication load than the exiting other implemented ANN. Furthermore this NoC implementation system is reconfigurable and expandable. In addition, this implementation method has a higher dependable than our former NoC implemented ANN system.