A new concept for hardware acceleration of database code

This paper introduces a new concept in the field of CPU performance improvement for non-numeric processing. Instead of accelerating the most time-critical high-level software constructs in algorithms that are traditionally used for software implementations, we analyzed a variety of modified algorithms (non-optimal for software implementations) and the acceleration of their inherent low-level primitives. An original class of algorithms, OTHER (Ordered Table Hashing and Radix Sort) algorithms, proved useful for efficient hardware support. This paper presents the fundamentals of the OTHER algorithms and analyzes their possible acceleration efficiency for selected non-numeric operations. Two original accelerator architectures have been proposed and their performance was evaluated. Both accelerators are realized in the standard-cell VLSI technology. It was shown that a low complexity hardware support may significantly improve the processor performance for non-numeric operations.