Title :
Comparison of iddt test efficiency in covering opens in SRAMs realised in two different technologies
Author :
Gábor Gyepes;Juraj Brenkuš;Daniel Arbet;Viera Stopjaková
Author_Institution :
Dept. of Microelectron., Slovak Univ. of Technol., Bratislava, Slovakia
fDate :
4/1/2011 12:00:00 AM
Abstract :
The paper deals with dynamic supply current (iddt) test method, where several parameters of the iddt waveform have been monitored. Simulations were performed on two 64-bit SRAM circuits, in which resistive open defects were investigated. The technologies used were 0.35 μm and 90 nm CMOS. The efficiency of iddt test in covering open defects for both technologies was evaluated.
Keywords :
"Random access memory","Resistance","Monitoring","Testing","Integrated circuit modeling","CMOS integrated circuits","Resistors"
Conference_Titel :
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2011 IEEE 14th International Symposium on
Print_ISBN :
978-1-4244-9755-3
DOI :
10.1109/DDECS.2011.5783118
