Hardware noise generator

We present a noise generator capable of generating different distributions based on the Box-Muller algorithm. The Gauss noise generators in the literature are modified in order to generate noise which follow Rayleigh, Rice and Exponential distributions. An implementation on a Virtex5-FXT70 FPGA occupies 1065 slices, 10 multipliers and 2 Block RAMs. The noise generator implemented on FPGA generated 2×12-bit noise samples at every clock sample. The throughput of the noise generator running at 250MHZ clock frequency is 500 million samples/seconds. Noise generator, can be used in radar simulations for generating radar echo returns or in wireless communications channel simulations.