DocumentCode
3649813
Title
A Reconfigurable Hardware Accelerated Platform for Clustered Wireless Sensor Networks
Author
Chih-Ming Hsieh; Zhonglei Wang;J. Henkel
Author_Institution
Dept. of Embedded Sytems, Karlsruhe Inst. of Technol., Karlsruhe, Germany
fYear
2012
Firstpage
498
Lastpage
505
Abstract
With the advent of the FPGA technology, a reconfigurable platform becomes possible to enhance the capability and adaptability of wireless sensor nodes while reducing the energy consumption. In this paper, we investigate the application of reconfigurable platform in wireless sensor networks. We focus on using hardware accelerated lossless compression to reduce the energy consumption of the data aggregation in clustered networks. Our study is based on real-world measurement on our integrated reconfigurable sensor node and the measured data is then used in the network simulation with a proper channel model. Our experiments show that the use of hardware acceleration on our platform can reduce the energy consumption by up to 35%. In addition, with proper parameters of the network, the run-time reconfiguration becomes beneficial and this opens a lot of opportunities for the optimizations according to the field situations.
Keywords
"Wireless sensor networks","Field programmable gate arrays","Hardware","Energy consumption","Image coding","Program processors","Head"
Publisher
ieee
Conference_Titel
Parallel and Distributed Systems (ICPADS), 2012 IEEE 18th International Conference on
ISSN
1521-9097
Print_ISBN
978-1-4673-4565-1
Type
conf
DOI
10.1109/ICPADS.2012.74
Filename
6414450
Link To Document