DocumentCode :
3664750
Title :
Consistent simulation of dynamic carrier trap/detrap effects on circuit performance
Author :
M. Miura-Mattausch;Y. Tanimoto;Y. Okada;K. Matsuura;H. Kikuchihara;H. J. Mattausch
Author_Institution :
Graduate School of Advanced Sciences of Matter, Hiroshima University, Higashi-Hiroshima 739-8530, Japan
fYear :
2015
fDate :
6/1/2015 12:00:00 AM
Firstpage :
463
Lastpage :
466
Abstract :
This paper summarizes investigations for the carrier-trapping influence on electric characteristics of MOSFETs. Particular focus is given on the transient characteristics, which is affected by the time constant of the carrier trapping during the device operation. For the purpose a compact model has been developed for circuit simulation by considering the dynamic trap/detrap feature in the framework of the complete surface-potential description in HiSIM. It is demonstrated that the trap-density model considers the trap/detrap time constant enables to simulate not only frequency dependent switching characteristics accurately but also long-term device degradation.
Keywords :
"Decision support systems","Conferences","Electron devices","Solid state circuits"
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2015 IEEE International Conference on
Print_ISBN :
978-1-4799-8362-9
Type :
conf
DOI :
10.1109/EDSSC.2015.7285151
Filename :
7285151
Link To Document :
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