DocumentCode
3667504
Title
A high reliability design for space-borne large-scale SRAM-based FPGAs with low requirement of memory space
Author
Zhonghua Zhou;Kang Wang;Jiapeng Wu;Qunyang Wang;Dongbo Pei
Author_Institution
Intermediate engineer of Space Star Technology Co.Ltd, Beijing, China
fYear
2015
fDate
4/1/2015 12:00:00 AM
Firstpage
482
Lastpage
486
Abstract
As FPGA is increasingly used by satellitic navigation receivers and many other space-based electronic devices, the influence on SRAM-based FPGA which caused by the robust ability of single event upsets (SEU) has become one of the most important topics for exploiting space-based equipments. Traditional online reconfigure system of SRAM-based FPGA needs both of original bit stream file and mask file, and therefore the memory space is doubled. Focus on this problem, this paper proposed a self-hosting configure management system for SRAM-based FPGA, which is based on compression algorithm. A compress and relevant decompress strategy is used to make full use of PROMs´ resources. The double-channel-reload method is used to improve the reliability of the SRAM-based FPGA in space radiation environment. Results of simulation show that, this design can effectively cure the influence from SEU and costs less hardware room.
Keywords
"Clocks","Navigation","Field programmable gate arrays","PROM","Quantum cascade lasers"
Publisher
ieee
Conference_Titel
Information Science and Technology (ICIST), 2015 5th International Conference on
Type
conf
DOI
10.1109/ICIST.2015.7289020
Filename
7289020
Link To Document