• DocumentCode
    3672793
  • Title

    Hard Real-Time Multiprocessor Scheduling Resilient to Core Failures

  • Author

    Borislav Nikolic;Konstantinos Bletsas;Stefan M. Petters

  • Author_Institution
    INESC-TEC, IPP, Porto, Portugal
  • fYear
    2015
  • Firstpage
    122
  • Lastpage
    131
  • Abstract
    Most multiprocessor scheduling theory overlooks the possibility of hardware failures that entirely nullify the computation carried out by a task instance, and potentially also make the respective processor henceforth unusable. Yet, such failures may occur, causing the system to fail. Motivated by this reality, we introduce a new concept of hard real-time schedulability guarantees for critical multiprocessor systems and analysis for their derivation. Namely, all deadlines must be met, even in the event of a core failure. A scheduling approach, based on global fixed priorities, and accompanying analysis, for achieving such guarantees are then formulated.
  • Keywords
    "Processor scheduling","Mathematical model","Hardware","Transient analysis","Interference","Semantics","Analytical models"
  • Publisher
    ieee
  • Conference_Titel
    Embedded and Real-Time Computing Systems and Applications (RTCSA), 2015 IEEE 21st International Conference on
  • Type

    conf

  • DOI
    10.1109/RTCSA.2015.26
  • Filename
    7299852