Read disturbance issue for nanoscale STT-MRAM

Spin transfer torque magnetic random access memory (STT-MRAM) has been widely considered as one of the most promising candidates for the next-generation nonvolatile memory technologies, thanks to its attractive features, including high density, high speed, low power and high endurance etc. However, our investigation demonstrates that read disturbance may become a big reliability issue of STT-MRAM, since read and write currents share the same path. As technology scales down to nanoscale nodes, this read disturbance issue becomes more serious and may turn into be a critical reliability barrier for STT-MRAM commercialization, because the difference between the read and write currents decreases. In this paper, we propose a circuit to detect the read disturbance by exploiting its typical features, i.e., (a) the resistance (read current) of the memory cell will have a sudden change if read disturbance occurs; (b) only one-direction of read disturbance can occur during normal read operations. Based on the detection results, the correct data can be restored back into the memory cells after read disturbance or system-level algorithms can be employed to correct the read disturbance fault.