DocumentCode :
3678568
Title :
Performance-Conscious Reconfiguration Structure for Large-Scale Coarse-Grained Reconfigurable System
Author :
Bo Liu;Yu Gong;Rui-he Wang;Yang Liu
Author_Institution :
Nat. ASIC Syst. Eng. Technol. Res. Center, Southeast Univ., Nanjing, China
fYear :
2015
Firstpage :
354
Lastpage :
359
Abstract :
This paper proposes a performance-conscious reconfiguration structure to accelerate the reconfiguration process in a high efficient coarse-grained reconfigurable system called Reconfigurable Array Template Version-I (RAT-I). To meet the high requirements of reconfiguration performance for large-scale reconfigurable systems, the hierarchical storage structure of configurations together with the configuration pre-fetching and buffering technologies are proposed in this work to improve the reconfiguration process. The experimental results show that, with the proposed performance-conscious reconfiguration structure, RAT-I can support 1920×1080@31fps real-time decoding of H.264 High-Profile (HiP) streams at a 250 MHz working frequency, and the performance of RAT-I is 2.37 times better than that of XPP which is a popular commercial reconfigurable media processor.
Keywords :
"Context","Decoding","Arrays","Acceleration","Hip","Streaming media"
Publisher :
ieee
Conference_Titel :
Cyber-Enabled Distributed Computing and Knowledge Discovery (CyberC), 2015 International Conference on
Type :
conf
DOI :
10.1109/CyberC.2015.31
Filename :
7307841
Link To Document :
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