Title :
Design of Sense Amplifier in the High Speed SRAM
Author :
Yong-Peng Tao;Wei-Ping Hu
Author_Institution :
Sch. of Integrated Circuits, Southeast Univ., Nanjing, China
Abstract :
Basic structure of latch-type SRAM sense amplifier is analyzed and advantages and disadvantages are compared in this paper, then an improved latch-type SRAM sense amplifier is presented. On this basis, a new sense amplifier is proposed, which can access data fast for low voltage and low power SRAM application. The simulation results show that this sense amplifier has advantage over the conventional and improved latch-type one in high-speed and low-power, based on an industry standard 1.0V/65 nm CMOS technology.
Keywords :
"Random access memory","Power demand","Transistors","CMOS integrated circuits","Inverters","Semiconductor device modeling","Delays"
Conference_Titel :
Cyber-Enabled Distributed Computing and Knowledge Discovery (CyberC), 2015 International Conference on
DOI :
10.1109/CyberC.2015.32