Full inverter characterization of PWM algorithms implemented with a very large flash memory SD card

This paper demonstrates the use of a very large SD Card flash-memory to the control of a three-phase inverter. The digital architecture differs from conventional counter-based implementation because it follows a pre-programmed optimal PWM pattern that is read from a large-size (8MB) memory with magnitude and phase as coordinates. A multi-optimal PWM algorithm is considered to reduce harmonics while maintaining the same count of switching processes as a conventional center-aligned PWM. The current paper presents the detailed experimental results achieved with a low-cost STEVAL-IHM-25 off-the-shelf inverter. Performance is investigated with respect to voltage harmonics, for both the novel multi-optimal PWM algorithm and the conventional center-aligned Space Vector (SV) Modulation. A discussion on the requirements and tools available for harmonic analysis of PWM algorithms is included.