A complete tool-chain for an interference-free deployment of avionic applications on multi-core systems

❙ A complete methodology & associated tool chain > Building an interference-free deployment of a safety critical application on a multi-core COTS > Applying an execution model decoupling execution and communication phases > A Constraint Problem Solving to automatically determine an interference-free static schedule ❙ Evaluated a safety critical application on a distributed memory multi-core > Demonstrated the scalability of the approach > Applied the approach to an avionic test-case running bare-metal > Observing no more inter-core interference endangering time isolation > Evaluated a significant performance gain ❙ Next Steps > Evaluation on a shared memory multi-core ➔ will only reduce interferences > Integration into an RTOS ➔ dealing with loading & unloading phases > Identification & mitigation of all interference channels is required for certification