• DocumentCode
    3682299
  • Title

    BSIM-CMG: Standard FinFET compact model for advanced circuit design

  • Author

    Juan P. Duarte;Sourabh Khandelwal;Aditya Medury;Chenming Hu;Pragya Kushwaha;Harshit Agarwal;Avirup Dasgupta;Yogesh S. Chauhan

  • Author_Institution
    Dept. of Electrical Engineering and Computer Science, University of California, Berkeley, USA
  • fYear
    2015
  • Firstpage
    196
  • Lastpage
    201
  • Abstract
    This work presents new compact models that capture advanced physical effects presented in industry FinFETs. The presented models are introduced into the industry standard compact model BSIM-CMG. The core model is updated with a new unified FinFET model, which calculates charges and currents of transistors with complex fin cross-sections. In addition, threshold voltage modulation from bulk-bias effects and bias dependent quantum mechanical confinement effects are incorporated into the new core model. Short channel effects, affecting threshold voltage and subhtreshold swing, are modeled with a new unified field penetration length, enabling accurate 14nm node FinFET modeling. The new proposed models further assure the BSIM-CMG model´s capabilities for circuit design using FinFET transistors for advanced technology nodes.
  • Keywords
    "Mathematical model","FinFETs","Integrated circuit modeling","Numerical models","Logic gates","Data models","Mobile communication"
  • Publisher
    ieee
  • Conference_Titel
    European Solid-State Circuits Conference (ESSCIRC), ESSCIRC 2015 - 41st
  • ISSN
    1930-8833
  • Print_ISBN
    978-1-4673-7470-5
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.2015.7313862
  • Filename
    7313862