DocumentCode :
3682791
Title :
An optimal operating point by using error monitoring circuits with an error-resilient technique
Author :
Jaemin Lee;Seungwon Kim;Youngmin Kim;Seokhyeong Kang
Author_Institution :
School of Electrical and Computer Engineering, Ulsan National Institute of Science and Technology, Korea 689-798
fYear :
2015
Firstpage :
69
Lastpage :
73
Abstract :
For applications related to human, such as Internet of Things (loT) and wearable devices, near threshold voltage (NTV) technology has been proposed for the trade-off between performance and energy consumption. However, errorresilient techniques are required in the circuits to improve reliability of the NTV operation. In this paper, we propose a low-overhead error-resilient system and a design flow for NTV operations. We use a new monitoring circuit, which can detect timing errors and find an optimal operation point of the system. Also, we propose two different methodologies, which are slack-based methodology and sensitivity-based methodology. From the proposed monitoring system and the sensitivitybased sorting algorithm, benchmark results show that the optimal designs provide up to 46% monitoring area reduction maintaining similar error detection ability of the conventional error-resilient design.
Keywords :
"Monitoring","Sensitivity","Logic gates","Integrated circuit reliability","Registers","Area measurement"
Publisher :
ieee
Conference_Titel :
Very Large Scale Integration (VLSI-SoC), 2015 IFIP/IEEE International Conference on
Electronic_ISBN :
2324-8440
Type :
conf
DOI :
10.1109/VLSI-SoC.2015.7314394
Filename :
7314394
Link To Document :
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