• DocumentCode
    3682830
  • Title

    Virtual prototype based on Aldebarn CPU core

  • Author

    Jae-Jin Lee;Chan Kim;KyungJin Byun;NakWoong Eum

  • Author_Institution
    Multimedia Processor Research Team, ETRI, South Korea
  • fYear
    2015
  • Firstpage
    303
  • Lastpage
    306
  • Abstract
    This paper proposes a virtual prototype based on the Aldebaran CPU core developed independently by ETRI. The virtual prototype provides instruction and function profiling functionality for software optimization as well as standard integration emulation interface (SystemC, Verilog, Netlist, etc.) compatibility, and architecture performance analysis for efficient adoption into a system-level design environment.
  • Keywords
    "Prototypes","Emulation","Multicore processing","Hardware","Software","Field programmable gate arrays","Decoding"
  • Publisher
    ieee
  • Conference_Titel
    Very Large Scale Integration (VLSI-SoC), 2015 IFIP/IEEE International Conference on
  • Electronic_ISBN
    2324-8440
  • Type

    conf

  • DOI
    10.1109/VLSI-SoC.2015.7314434
  • Filename
    7314434