DocumentCode
3683262
Title
Dependable real-time task execution scheme for a many-core platform
Author
Tomohiro Yoneda;Masashi Imai;Hiroshi Saito;Kenji Kise
Author_Institution
National Institute of Informatics, Japan
fYear
2015
Firstpage
197
Lastpage
204
Abstract
This paper explores a new dependable real-time task execution scheme for a many-core system. This scheme is based on duplication with temporary TMR and reconfiguration. Unlike a common scheme with several spare units, every processor core in our scheme is used for task execution. Thus, redundant processor cores contribute to both the reliability and performance of the entire system. We first show the implementation details of our scheme. Then the proposed scheme is analytically evaluated using abstracted models and compared with two other schemes.
Keywords
"Tunneling magnetoresistance","Actuators","Hardware","Fault tolerant systems","Redundancy"
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), 2015 IEEE International Symposium on
Type
conf
DOI
10.1109/DFT.2015.7315162
Filename
7315162
Link To Document