FACE: Fast and Customizable Sorting Accelerator for Heterogeneous Many-core Systems

Performance improvements of a single-core processor relying on high clock rates reached the limit. Instead of a single-core processor, multi-core and many-core processors have been mainstream to accelerate applications by parallel processing. Year by year, the number of cores integrated in a single chip has been increased due to improvements of semiconductor integration technologies depending on Moore´s Law. On the other hand, Moore´s Law will be ended in the near future. This means that the approaches relying on the increase in the number of cores will be hopeless, thus we have to consider other effective ways. One of them is to design application specific hardware. Several research organizations have explored it and reported its remarkable findings. We focus on such an acceleration approach with dedicated hardware. As a case study with dedicated hardware, we present a sorting acceleration method. Sorting is an extremely important computation kernel that should be accelerated in a lot of fields, such as databases, image processing, data compression, etc. We propose a sorting accelerator combining Sorting Network and Merge Sorter Tree, and detail the design and implementation. Our proposed sorting accelerator is customizable, thus designers can implement a sorting accelerator composed of required hardware resources by means of tuning design parameters. Our experiments show that the proposed hardware achieves up to 10.06x sorting performance, compared with Intel Core i7-4770 operating at 3.4GHz, when sorting 256M 32-bits integer elements. In order to allow every designer to easily and freely use this accelerator, the RTL source code is released as an open-source hardware.