DocumentCode
3691862
Title
Reconfigurable IBM PC Compatible SoC for Computer Architecture Education and Research
Author
Eri Ogawa;Yuki Matsuda;Tomohiro Misono;Ryohei Kobayashi;Kenji Kise
Author_Institution
Dept. of Comput. Sci., Tokyo Inst. of Technol., Tokyo, Japan
fYear
2015
Firstpage
65
Lastpage
72
Abstract
In order to develop high performance computer systems efficiently, environments to evaluate architectural ideas are required. Software environments such as simulators are very flexible, and thus often used. On the other hand, if the target hardware is complex and large, it is very hard to finish the simulation in practical time because of software´s slow simulation speed. Thus, we develop a hardware environment for efficient evaluation of computer systems. We propose and develop an IBM PC Compatible SoC on an FPGA where hardware developers can evaluate their custom architectures. The SoC has an x86 soft core processor which can run general purpose operating systems. By making the proposed system run on FPGAs of two major vendors, i.e. Xilinx and Altera, we believe that it can be widely adopted. Besides, the SoC can be used for learning computer systems, because of its open-source policy. In this paper, we detail the design and implementation of the proposed SoC, and verify that it accurately runs some applications. As a case study to demonstrate usability of the SoC for computer research, we implement two types of L2 caches in Verilog HDL and evaluate their performance by running the SPEC CPU2000 INT benchmark suite. Additionally, we discuss how the SoC can be used for computer education.
Keywords
"Hardware design languages","Field programmable gate arrays","Computers","Process control","Hardware","Random access memory","IP networks"
Publisher
ieee
Conference_Titel
Embedded Multicore/Many-core Systems-on-Chip (MCSoC), 2015 IEEE 9th International Symposium on
Type
conf
DOI
10.1109/MCSoC.2015.35
Filename
7328188
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