• DocumentCode
    3694865
  • Title

    Quasi-static analytical model for the dynamic operation of triple-gate junctionless nanowire transistors

  • Author

    R. Trevisoli;R. T. Doria;M. de Souza;M. A. Pavanello

  • Author_Institution
    Electrical Engineering Department, Centro Universitá
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    This work presents, for the first time, an analytical and explicit model for the intrinsic transcapacitances and transconductances of triple-gate Junctionless Nanowire Transistors. The expressions are derived from a surface potential-based charge model and are validated with 3D TCAD numerical simulations.
  • Keywords
    "Logic gates","Capacitance","Transistors","Integrated circuit modeling","Analytical models","Nanoscale devices","Semiconductor device modeling"
  • Publisher
    ieee
  • Conference_Titel
    SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/S3S.2015.7333522
  • Filename
    7333522
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3694865