• DocumentCode
    3694868
  • Title

    A soft error tolerant 4T gain-cell featuring a parity column for ultra-low power applications

  • Author

    Robert Giterman;Adam Teman;Lior Atias;Alexander Fish

  • Author_Institution
    Faculty of Engineering, Bar-Ilan University, Ramat Gan, Israel
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Embedded memories often constitute over 50% of the total silicon area and are the main consumer of static power in ultra-low power (ULP) applications. Operation at sub-threshold supply voltages can significantly reduce the power dissipation of memory arrays, however it also results in lower noise margins and much higher susceptibility to radiation effects, such as soft errors or single event upsets (SEU).
  • Keywords
    "Junctions","Transistors","Arrays","Power demand","Single event upsets","SRAM cells"
  • Publisher
    ieee
  • Conference_Titel
    SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/S3S.2015.7333525
  • Filename
    7333525
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3694868