• DocumentCode
    3695880
  • Title

    Power saving and noise reduction of 28nm CMOS RF system integration using integrated fan-out wafer level packaging (InFO-WLP) technology

  • Author

    Chuei-Tang Wang;Jeng-Shien Hsieh;Victor C. Y. Chang;En-Hsiang Yeh;Feng-Wei Kuo;Hsu-Hsien Chen;Chih-Hua Chen;Ron Chen;Ying-Ta Lu;Chewn-Pu Jou;Hao-Yi Tsai;C. S. Liu;Doug C. H. Yu

  • Author_Institution
    Research and Development, Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, Taiwan, R. O. C.
  • fYear
    2015
  • Abstract
    An integration of 28 nm CMOS RF system with 3D solenoidal inductors (3DSI) in integrated fan-out (InFO) wafer level package technology is studied. The 3DSI provides the performance of Q-factor of 51 and isolation of −53 dB. With the 3DSI, the RF system in the InFO technology results in power saving by 58% and noise reduction by 80% in LNA and VCO, respectively, compared with those in RF SoC system. The InFO technology provides a novel solution for RF system integration.
  • Keywords
    "CMOS integrated circuits","Radio frequency","Inductors","Yttrium","Resonant frequency","System integration","Substrates"
  • Publisher
    ieee
  • Conference_Titel
    3D Systems Integration Conference (3DIC), 2015 International
  • Type

    conf

  • DOI
    10.1109/3DIC.2015.7334573
  • Filename
    7334573
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3695880