• DocumentCode
    3697875
  • Title

    A vertical solenoid inductor for noise coupling minimization in 3D-IC

  • Author

    Gilad Yahalom;Alice Wang;Uming Ko;Anantha Chandrakasan

  • Author_Institution
    Massachusetts Institute of Technology, Cambridge, United States
  • fYear
    2015
  • fDate
    5/1/2015 12:00:00 AM
  • Firstpage
    55
  • Lastpage
    58
  • Abstract
    This paper presents the use of an integrated solenoid inductor in three dimensional integrated circuits (3D-IC) for improved noise mitigation. The structure is fabricated in a two-tier, stacked 28nm CMOS using through silicon vias (TSV). The structure is implemented as part of an LC voltage-controlled oscillator (VCO), and exhibits 6dB improvement in phase noise and 14dB less coupling from adjacent digital clock lines compared to a planar two-turn inductor.
  • Keywords
    "Solenoids","Inductors","Voltage-controlled oscillators","Couplings","Clocks","Phase noise","Frequency measurement"
  • Publisher
    ieee
  • Conference_Titel
    Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/RFIC.2015.7337703
  • Filename
    7337703
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3697875