DocumentCode
3697878
Title
A wideband fractional-N synthesizer with low effort adaptive phase noise cancellation for low-power short-range standards
Author
Ye Zhang;Jan Henning Mueller;Bastian Mohr;Lei Liao;Aytac Atac;Ralf Wunderlich;Stefan Heinen
Author_Institution
Integrated Analog Circuits and RF Systems Laboratory, RWTH Aachen University, D-52062, Germany
fYear
2015
fDate
5/1/2015 12:00:00 AM
Firstpage
71
Lastpage
74
Abstract
This paper presents a wideband low-spur fractional-N synthesizer with an adaptive noise cancellation technique. By adopting the classical loop filter, the ΣΔ quantization noise as well as the spurs are compensated with simple calibration circuits. The synthesizer is fully integrated in 130nm CMOS technology, consuming 0.33mm2 area and 8.3mW core power. It operates at 1.8 GHz carrier frequency with 1MHz bandwidth. The outband phase noise is −129 dBc/Hz at 3MHz offset, the reference spur is −68 dBc, and the worst inband fractional spur is −56 dBc.
Keywords
"Calibration","Phase locked loops","Phase noise","Synthesizers","Quantization (signal)","Modulation","Voltage-controlled oscillators"
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE
Type
conf
DOI
10.1109/RFIC.2015.7337707
Filename
7337707
Link To Document