• DocumentCode
    3697918
  • Title

    A Sub-GHz low-power transceiver with PAPR-tolerant power amplifier for 802.11ah applications

  • Author

    Xiaobao Yu;Meng Wei;Yun Yin;Ying Song;Zhihua Wang;Yichuang Sun;Baoyong Chi

  • Author_Institution
    Institute of Microelectronics, Tsinghua University, Beijing 100084, China
  • fYear
    2015
  • fDate
    5/1/2015 12:00:00 AM
  • Firstpage
    231
  • Lastpage
    234
  • Abstract
    A fully-integrated Sub-GHz low-power transceiver (TRX) for 802.11ah applications is presented. The receiver takes both advantages of Low-IF/Zero-IF architectures while supporting 1/2/8MHz reconfigurable signal bandwidth. A Σ-Δ fractional-N PLL with Class-C VCO is employed to provide the LOs. In order to enhance the power amplifier (PA) back-off efficiency, a Peak-to-Average-Power-Ratio (PAPR) tolerant technique is proposed with the aid of a power control loop to dynamically detect the input signal PAPR and flexibly reconfigures the PA´s operation modes. With digitally-assisted self-calibrations for LO leakage and image rejection, the transmitter obtains −51.6dBc LO leakage and 51.2dBc image rejection ratio (IRR). A JESD207 interface is also included to communicate with the digital baseband. Implemented in 180nm CMOS, the receiver achieves 4dB NF and dissipates 18.9mW from a 1.7V supply. The CMOS PA achieves 13.6dBm output P1dB with 25.5% PAE in high power mode (HPM) and ×2.61 PAE improvement at 7dB back-off power in low power mode (LPM).
  • Keywords
    "Transceivers","Impedance matching","Power amplifiers","Peak to average power ratio","System-on-chip","Power control","Voltage-controlled oscillators"
  • Publisher
    ieee
  • Conference_Titel
    Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/RFIC.2015.7337747
  • Filename
    7337747