• DocumentCode
    3697927
  • Title

    A 55-GHz power-efficient frequency quadrupler with high harmonic rejection in 0.1-µm SiGe BiCMOS technology

  • Author

    Yi-Shin Yeh;Brian A. Floyd

  • Author_Institution
    Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, USA
  • fYear
    2015
  • fDate
    5/1/2015 12:00:00 AM
  • Firstpage
    267
  • Lastpage
    270
  • Abstract
    This paper presents a V-band frequency quadrupler in 0.1-µm SiGe BiCMOS technology with 3-dB bandwidth from 44.8 to 57.2 GHz. The circuit employs cascode stacks comprising in-phase class-C common-emitter and anti-phase class-AB cascode devices to obtain current pulses at ×4 frequency. Four such cascodes driven with differential and tunable quadrature increase the 4th harmonic output power while suppressing all other harmonics 22 dB or more. Measurements show >7.4-dBm 4th harmonic output power, and >5.2% power efficiency for the core of the multiplier.
  • Keywords
    "Harmonic analysis","Power generation","Silicon germanium","Power system harmonics","Transistors","BiCMOS integrated circuits","Frequency measurement"
  • Publisher
    ieee
  • Conference_Titel
    Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/RFIC.2015.7337756
  • Filename
    7337756