DocumentCode
3697945
Title
Gain and noise optimization of a passive sliding IF architecture
Author
S.Vahid M. Bonehi;Christoph Beyerstedt;Zhimiao Chen;Lei Liao;Ralf Wunderlich;Stefan Heinen
Author_Institution
Integrated Analog Circuits and RF Systems, RWTH Aachen University, Germany
fYear
2015
fDate
5/1/2015 12:00:00 AM
Firstpage
339
Lastpage
342
Abstract
This paper presents gain and noise optimization of a passive Sliding IF downconverter as a promising choice for Zero-IF and Low-IF receivers. With detailed mathematical analysis of the architecture we propose a new design that provides 7.6 dB improvement of relative conversion gain with profound noise figure and IIP3 performance. The results of the mathematical derivation are supported by modeling, circuit simulation and measurement of a prototype chip fabricated on a standard 130nm CMOS technology. The chip operates under supply voltage of 1.2V and occupies 750µm × 200µm active area.
Keywords
"Gain","Mixers","Radio frequency","Receivers","Computer architecture","Integrated circuit modeling","CMOS integrated circuits"
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE
Type
conf
DOI
10.1109/RFIC.2015.7337774
Filename
7337774
Link To Document