Practical considerations for application specific time interleaved ADCs

Time interleaving provides an additional degree-of-freedom in achieving ultra-fast quantization at reasonably high resolution, However, mismatches in multiple paths of the signal chain create systematic errors. Mitigating all possible time-interleaved errors comes at a heavy cost in complexity, risk, power and performance. Knowing which errors are most important and which can be neglected in any given application is essential for picking an appropriate architecture and calibration scheme. This paper will review specification requirements, specifically for frequency division multiplexed channels where time interleaved ADCs are finding increased use. Instead of lumping all error sources into a single metric such as ENOB, different types of error sources are treated separately to determine their impact on overall system performance.