Title :
Novel short-channel In0.53Ga0.47As junctionless nanowire nFET with raised s/d structure: An ultimately scaled 1-D transistor architecture
Author :
Kian Hui Goh;Yee-Chia Yeo
Author_Institution :
Department of Electrical and Computer Engineering, National University of Singapore (NUS), Singapore
fDate :
6/1/2014 12:00:00 AM
Abstract :
We report the first demonstration of a novel short-channel junctionless nanowire nFET with raised S/D architecture, featuring implant-free and damage-free channel formation by an anisotropic wet etch process. Devices with sub-20 nm channel length (LCH) and sub-20 nm nanowire width (WNW) were realized in this work. Good transfer characteristics (i.e. small subthreshold swing (SS) of 150 mV/decade) were achieved despite a large equivalent oxide thickness (EOT) of 6 nm and substrate doping of 5 × 1019 cm-3. The In0.53Ga0.47As junctionless nanowire nFET shows promise for further LCH scaling into the sub-10 nm regime.
Keywords :
"Nanoscale devices","Logic gates","Wires","Resistance","Field effect transistors","Aluminum oxide","Tin"
Conference_Titel :
Silicon Nanoelectronics Workshop (SNW), 2014 IEEE
Print_ISBN :
978-1-4799-5676-0
DOI :
10.1109/SNW.2014.7348538