DocumentCode :
3710871
Title :
Capacitorless LDO with fast transient response based on a high slew-rate error amplifier
Author :
Cristian R?ducan;Marius Neag
Author_Institution :
Technical University of Cluj-Napoca, 28 Memorandumului St., Romania
fYear :
2015
Firstpage :
285
Lastpage :
288
Abstract :
This paper presents a high slew-rate error amplifier (EA) used to implement a capacitorless low-dropout voltage regulator (LDO) with a very fast transient response. The proposed EA improves a recently published OA structure, by employing high-swing input buffers and a local common mode feedback. Thus, the figures-of-merit related to the EA gain-bandwidth and slew-rate are 2.75, respectively 24 times better than for the initial OA. The EA was used to implement a LDO that requires only 1.1uA quiescent current but has an output current capability of 100mA. The high slew-rate of the EA helps this LDO to achieve low overshoot/undershoot (200mV/274mV) in case of a fast (1us) load step of 100mA, while employing only an on-chip load capacitance of 100pF. Compared with similar implementations, the proposed LDO yields same or better transient performance while requiring significantly less quiescent current. Thus its figure of merit results at least three times better than for its counterparts. The line and load regulation are 0.07mV/V, respectively 0.0028mV/mA.
Keywords :
"Regulators","Transistors","Capacitors","Transient analysis","Voltage control","Logic gates","Capacitance"
Publisher :
ieee
Conference_Titel :
Semiconductor Conference (CAS), 2015 International
ISSN :
1545-827X
Print_ISBN :
978-1-4799-8862-4
Type :
conf
DOI :
10.1109/SMICND.2015.7355234
Filename :
7355234
Link To Document :
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