Material technology for 2.5D/3D package

Packaging material is one of the key components for through-silicon via (TSV) 2.5D/3D package giving a strong impact on the higher density integration and its reliability. We have developed and evaluated our packaging materials by collaborating with 3D system integration program in Interuniversity microelectronics center (IMEC). In this paper, we report the assembly and reliability results on film type underfill, photosensitive dielectric for redistribution layer as well as stress buffer, and molding compound. In the case of using our film type underfill, five-chip stacked package with TSV and 20 μm pitch bumps was demonstrated with excellent electrical yield. Also photosensitive dielectric realizes redistribution layers with 3 μm resolution. Finally we integrated our film type underfill, dielectric and molding compound in the stacked package, passing reliability tests such as thermal cycling and pressure cooker test.