Ivy Bridge Server: A Converged Design

Author

Papazian, Irma Esmer ; Kottapalli, Sailesh ; Baxter, Jeff ; Chamberlain, Jeff ; Vedaraman, Geetha ; Morris, Brian

Volume

35

Issue

2

fYear

2015

fDate

Mar.-Apr. 2015

Firstpage

16

Lastpage

25

Abstract

The Intel microarchitecture code named Ivy Bridge (IVB) represents Intel´s first processor (CPU) design that services product markets from high-end desktops to mission-critical computing. With one converged design, IVB enables a rich portfolio of products and meets power, performance, and cost targets through multiple die options and configurations. IVB is the first server CPU using Intel´s 22-nm process technology. It achieves scalability in die size, core count, cache size, socket count, and memory size while improving power efficiency and decreasing idle power.

Keywords

computer architecture; microprocessor chips; CPU; IVB; Intel 22-nm process technology; Intel microarchitecture code; Ivy Bridge server; cache size; core count; die size; high-end desktops; memory size; mission-critical computing; processor; size 22 nm; socket count; Cache storage; Computer architecture; Energy efficiency; High performance computing; Memory management; Scalability; CPU; I/O; application performance; bandwidth; cache; coherence; coherence protocol; computer architecture; memory controller; memory directory; multinode; multisocket; off-die interconnect; on-die interconnect; performance; platform; power efficiency; process technology; processor; snoop; system memory interconnect; system performance scalability; system scalability;

fLanguage

English

Journal_Title

Micro, IEEE

Publisher

ieee

ISSN

0272-1732

Type

jour

DOI

10.1109/MM.2015.33

Filename

7091791