DocumentCode
3715112
Title
Toward limits of constructing reliable memories from unreliable components
Author
Lav R. Varshney
Author_Institution
Department of Electrical and Computer Engineering, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign, United States of America
fYear
2015
Firstpage
114
Lastpage
118
Abstract
There has been long-standing interest in constructing reliable memory systems from unreliable components like noisy bit-cells and noisy logic gates, under circuit complexity constraints. Prior work has focused exclusively on constructive achievability results, but here we develop converse theorems for this problem for the first time. The basic technique relies on entropy production/dissipation arguments and balances the need to dissipate entropy with the redundancy of the code employed. A bound from the entropy dissipation capability of noisy logic gates is used via a sphere-packing argument. Although a large gap remains between refined achievability results stated herein and the converse, some suggestions for ways to move forward beyond this first step are provided.
Keywords
"Decoding","Entropy","Registers","Noise measurement","Integrated circuit reliability","Complexity theory"
Publisher
ieee
Conference_Titel
Information Theory Workshop - Fall (ITW), 2015 IEEE
Type
conf
DOI
10.1109/ITWF.2015.7360745
Filename
7360745
Link To Document