Capacitive floating level shifter: Modeling and design

This paper introduces the failure operation principle of the capacitive floating level shifter, as well as its simplified circuit model. Based on the model, the mathematical equations for analyzing the level shifter´s characteristics and its respective performances are also derived. Design criteria for the capacitive floating level shifter are proposed derived from the model and corresponding MATLAB simulation results. Furthermore, transistor-level simulations using 65-nm CMOS technology verify the deduced simplified circuit model and the proposed design criteria, following which, overdesign can be avoided to guarantee the proper operation of the floating capacitive level shifter, thus saving chip area and reducing cost.