DocumentCode :
3729148
Title :
Area optimized implementation of unsymmetric trimmed adaptive Median Filter for edge preservation on FPGA
Author :
Lole Bhagyashri A.; Pise A.C; Surwase S. V.
Author_Institution :
SKN Sinhgad College of Engineering, Pandharpur, 413304, India
fYear :
2015
Firstpage :
86
Lastpage :
89
Abstract :
To remove the (salt and pepper)impulse noise from images by using the Median Filter. This algorithmic rule is employed for low, medium and high noise densities. Additionally, to preserve edges and sharp image features. The proposed technique is implemented by developing in MATLAB and additionally implemented by using the Xilinx Spartan3 FPGA device. With this planned algorithmic rule less area is needed and thus additional power is saved.
Keywords :
"Noise measurement","Field programmable gate arrays","Image edge detection","MATLAB","Filtering algorithms","Hardware","Adaptive filters"
Publisher :
ieee
Conference_Titel :
Green Computing and Internet of Things (ICGCIoT), 2015 International Conference on
Type :
conf
DOI :
10.1109/ICGCIoT.2015.7380434
Filename :
7380434
Link To Document :
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